In many applications, using general purpose, commercially available logic devices in a circuit may provide a suboptimum result. Commercially available, general purpose chips have a standard number and location of logic gates to which a circuit design must conform to if standard chips (integrated circuits) are used. Such integrated circuits (ICs) often include additional gates that may not be used, may use power, occupy space, and generate heat, at the expense of performance. The chip logic can not be altered to fit the custom logic.
Custom chips can provide an alternative to commercially available, general purpose chips. ASICs (Application Specific Integrated Circuits) are a form of custom ICs which are usually specifically designed for particular application. However, custom chips are expensive and difficult to manufacture in small quantities, and often require greater time to manufacture. ASICs may be completely custom or may be created from a pre-existing core design which is personalized with "personalization layers." A personalization layer is typically an interconnect layer which may be selectively applied to interconnect circuits in an underlying core logic or an IC. In this situation, the personalization layer "programs" the core logic for a particular function, but if there is a "bug" or error in the design, the IC must be fabricated again, with a modification in the personalization layer or the underlying core logic in order to correct the error. Redesigning and fabricating such an IC is considerably more expensive, at least for small volume parts, than re-programming a general purpose field programmable device. Thus, in many applications, commercially available, general purpose field programmable devices are preferred over custom chips such as ASICs because of the re-programmability of such programmable devices.
Programmable logic devices (PLDs) which include a programmable logic array (PLA) are examples of commercially available, general purpose ICs which provide customization. Programmable logic devices may include a set of input lines and a set of AND-OR or NOR-NOR logic arrays, with transistors coupling the inputs to the logic arrays. Such devices often implement Boolean functions as sum-of-products, or SOP, equations. Programmable Logic Devices (PLDs) allow a user to connect various device inputs to the AND-gate inputs, or any of a number of AND-gate outputs to any of a number of OR-gate inputs. Such connections are accomplished by programming or not programming signal paths, by connecting or disconnecting preexisting data paths. Programming may be accomplished by, for example, fusing or antifusing.
Many commercially available PLDs provide auxiliary circuitry for testing and programming. Although necessary in many available PLD's, the auxiliary test and programming circuitry carries a high cost in die area.
Therefore, it is desirable to have a device that occupies smaller die area. This may be accomplished by reducing and/or eliminating programming and/or testing circuitry in the device. It is also desirable to have a method of producing such a device that uses a cheaper or simpler process. Such a method may result in better yields, because of the simpler process.
CPLD's (complex PLD's) have an advantage in their predictability of timing that may be essential for time-critical designs. However, CPLD's may be relatively expensive to produce, thus it is desirable to have a cheaper alternative to CPLD's without the overhead associated with CPLD manufacture.
The devices in a logic array typically include programmable devices (e.g. E.sup.2 PROM, EPROM, fuses, antifuses, flash memory devices) which allow the logic arrays to be programmable (or re programmable). The input lines and the logic arrays are also typically interconnected programmably by similar programmable devices.
It is also desirable to have mask programmable chips that may be faster and may consume less power than fully programmable PLDs and yet are derived from programmable PLD's such that redesign of the mask programmable device merely involves re-programming of the programmable device to derive the mask for the mask programmable device.
The present invention, which allows reprogramming and testing of a FLPD by a user or customer, concerns a method of quickly and efficiently producing a mask programmed PLD having many advantages (e.g. smaller size and cheaper process) over methods of producing FPLDs, while having the capability of meeting the particular needs of the user, and ensuring predictability of timing and correctness of design.